See also: Main Boot Page, EFI Boot Process, Roadmap

Phase

Component

Brief Description

Hardware/Software Mechanism

Stage 1

MBR / Boot Sector

The first 512 bytes on disk. Loads the stage2 bootloader in the reserved space of the MBR to RAM.

BIOS INT 0x13h (LBA); Signature 0xAA55 at byte 510.

Stage 2

Memory Detection

Queries the BIOS for a list of all usable RAM regions. This is the source for your memMapAddr.

BIOS INT 0x15, EAX=0xE820.

Stage 2

A20 Gate

Disables the "wraparound" at 1MB to allow access to higher memory which is where the kernel will load normally.

"Fast A20" via I/O Port 0x92 or BIOS INT 0x15, AX=0x2401.

Stage 2

Video Setup

(Optional) Sets a graphical mode (e.g., 1024x768) before BIOS interrupts become unavailable (reserved for future).

VESA BIOS Extensions (VBE).

Transition

GDT Setup

Defines Global Descriptor Table with Flat 4GB segments for Code and Data.

LGDT instruction; Segment limit 0xFFFFFFFF.

Transition

Protected Mode Switch

Flips the CPU from 16-bit Real Mode to 32-bit Protected Mode.

Set Bit 0 in CR0 register; Far JMP to flush pipeline.

Stage 3

Filesystem Parser

Navigates the storage (e.g., FAT32) to find the valeciumx-(version) file under /boot of the host filesystem.

Custom code to read Root Directory and Clusters/Extents.

Stage 3

Executable Loader

Copies the kernel binary to its linked destination at 0xa00000.

Memory copy; ELF Program Header parsing if using ELF.

Handoff

Info Structure

Packs the memory map and boot parameters into a struct for the C parser.

Populating a memory region (e.g., 0x7000) with packed data.

Handoff

Final Jump

Sets EAX to your magic value, EBX to the info pointer, and jumps to the kernel.

mov eax, MAGIC; mov ebx, INFO_PTR; jmp KERNEL_ENTRY.